Principal Layout Engineer - Analog/ PMIC (d/ m/ f)

ams-OSRAM International GmbH

Berufsfeld
Technik

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Principal Layout Engineer - Analog/ PMIC (d/ m/ f), ams-OSRAM International GmbH

The ams OSRAM Group is a global leader in intelligent sensors and emitters. We combine light with intelligence and passion with innovation, thereby enriching people's lives. Our approximately 20,000 employees worldwide focus on innovations in the fields of sensing, lighting, and visualization to make travel safer, medical diagnostics more precise, and everyday communication more engaging.

Principal Layout Engineer - Analog/ PMIC (d/ m/ f)
Premstätten, Styria, Austria - ams-OSRAM AG

Aufgaben

Lead technical development and toplevel lead for power management projects
Support power device development and optimization
Drive methodology improvements and guidelines across projects
Layout and verification of complex integrated analogue/mixed signal CMOS circuits and blocks
Floorplan and execution of complex analogue/mixed signal CMOS circuits
Interface to all other Tapeout relevant departments, e.g. Assembly, Test, Probecard, Maskshop , and also interface to external foundries
Technical project leadership including planning and scheduling tasks, coordinate the tasks for the project layout team
Performing technical project reviews
Technical team development and educate young team members
Creation and patenting of new IP
Deep technical knowledge and knowledge sharing for PMIC relevant layout strategies like isolation strategy, ballout optimization for power, power device routing, power flow and EMIR verification support
Technical understanding of BCD semiconductor technology

Profil

University degree in Electronics or other related technical education
15+ years of experience in analog and mixed signal integrated circuit layout
Knowledge of analog and mixed signal blocks (e.g. ADC, DAC, LDO's, LNA's, PGA, Bandgap circuits ) and layout techniques (e.g. matching, shielding, star point routing )
Knowledge on ESD, Latch Up effects and the Layout techniques to prevent problems and possible layout solutions to prevent IR-Drop, Voltage Drop
Deep experience in debugging check results (e.g. Design Rule Check, Layout versus Schematic )
Experience of relevant EDA tools for IC design (preferably with Cadence Design Framework / Siemens Calibre Checktool)
Analytical mind for solving complex problems
Communication skills: ability to clearly explain technical issues within the team
Team oriented, committed to deadlines and development discipline
High level of commitment and flexibility - Taking ownership to "make it happen"
Strong team player with a visible "what's best for the company" mentality
Fluent in English, knowledge of German would be an advantage

Wir bieten

We offer competitive salaries and additional benefits based on your performance, experience and qualification.
The employment is in accordance with the collective salary and wage agreement for employees of the electrical and electronics industry, employment group G ( ) . We offer a higher compensation depending on your expertise and skills.

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Jetzt bewerben